1. Field of the Invention
The present invention relates to computer systems and more particularly to a method and apparatus for changing the operating clock speed of the system during doze modes to minimize power consumption.
2. Description of the Related Art
In recent years, the popularity of portable and laptop computers has steadily grown. As a result, computer manufacturers have worked diligently to improve the design and the performance of these computers. Portable and laptop technology has now advanced to a stage where the performance of the portable computers is approximately equal to that of the larger desk top computers. Some portables are capable of operating at a clock speed of 25 MHz or even higher.
Although they perform like desk top computers, portable computers suffer from one inherent disadvantage. Because they are portable, they must be operated under battery power, which means that power conservation is a major concern. One method for saving power is to simply reduce the operating clock speed of the system, but most users demand full performance from their systems so reducing the operating clock speed does not seem to be a desirable method for saving power.
It is not necessary for a computer to always operate at its highest clock speed, however. There are periods, called "doze modes," during which the central processing unit is not executing any instructions. During these periods, the clock speed of the processor may be altered without adversely affecting the operation of the computer. Prior attempts have been made to alter the operating clock speed of a processor but these methods involved changing the clock speed dynamically, that is, on-the-fly without interrupting the processor. However, the prior art methods cannot be implemented in applications where timing paths are critical, such as computer systems using INTEL 80486 series CPUs. Therefore, there exists a need for a method and apparatus for changing the operating clock speed of a computer system which is more generally applicable.